bit slicing

Bit slicing (although it was not called that) was also used in computers before integrated circuits.

Bit slicing is a technique for constructing a processor from modules of smaller bit width.

Our implementation uses bit slicing in software to achieve high speeds by exploiting bit-level parallelism.

It is well suited to a bit slicing implementation using the SSE2 instruction set, giving speeds of 16.8 Cycles per byte.

In 1979 McCormack was employed by NCR right out of college, and they had developed a Bit slicing implementation of the p-code machine using the Am2900 chip set.

The stream cipher part of CSA is prone to bit slicing, a software implementation technique that allows decryption of many blocks, or the same block with many different keys, at the same time.

By using a bit slicing technique, Am2900 family was able to implement a CCU with data, addresses, and instructions to be any multiple of 4-bits by multiplying the number of ICs.

The block cipher part is harder to bit slice, as the S-boxes involved are too large (8x8) to be efficiently implemented using logical operations, a prerequisite for bit slicing to be more efficient than a regular implementation.

The main advantage in the late 60's to mid 80's was that bit slicing made it economically possible in smaller processors to use bipolar transistors, which switch much faster than NMOS or CMOS transistors.