pin grid array , PGA (Abkürzung)

The first chip package of this kind was a ceramic pin grid array package.

This type of packaging uses a ceramic substrate with pins arranged in a pin grid array.

This is thinner than a pin grid array socket arrangement, but is not removable.

A pin grid array, often abbreviated PGA, is a type of integrated circuit packaging.

Both are packaged in 591-pin ceramic pin grid array (CPGA) packages.

Unlike pin grid arrays, land grid array packages are designed to fit either in a socket, or be soldered down using surface mount technology.

Pin grid array (PGA)

Pin grid array (PGA) packages may be considered to have evolved from the DIP.

It was an upgrade to Intel's first standard pin grid array (PGA) socket and the first with an official designation.

It distinctively used a ceramic interposer much like the Thunderbird instead of the organic pin grid array package used on all later Palomino processors.

CPUs with a PGA (pin grid array) package are inserted into the socket and the latch is closed.

It was packaged in a ceramic multi-chip module (MCM) with a pin grid array (PGA).

The Staggered pin grid array (SPGA) is used by Intel processors based on Socket 5 and Socket 7.

Plastic pin grid array (PPGA) packaging was used by Intel for late model Mendocino core Celeron processors based on Socket 370.

A Stud Grid Array (SGA) is a short-pinned pin grid array chip scale package for use in Surface-mount technology.

They were packaged in 68-pin leadless chip carriers or pin grid arrays and were mounted onto the printed circuit board in sockets or were soldered in place.

LGA packaging is related to ball grid array (BGA) and pin grid array (PGA) packaging.

The chips are packaged in ceramic pin grid array (CPGA) packages that can have up to 300 pins and dissipate a maximum of 4 W of heat each.

The Micro-PGA2, also known as the μPGA2, is Intel's pin grid array package for their Pentium III and some later Celeron mobile processors.

Consisting of 320 pins, this was the first socket to use a staggered pin grid array, or SPGA, which allowed the chip's pins to be spaced closer together than earlier sockets.

The CMIC ASICs are fabricated in a CMOS process and are packaged in a 299-position pin grid array (PGA) package.

Utilizing Intel's latest m PGA (Micro Pin Grid Array) CPU and 440MX chipset assures the system with greater speed and performance within its ultra-slim body.

The socket is a zero insertion force pin grid array type with 462pins (nine pins are blocked in the socket to prevent accidental insertion of Socket 370 CPUs, hence the number 462).

In the 1980s VLSI pin counts exceeded the practical limit for DIP packaging, leading to pin grid array (PGA) and leadless chip carrier (LCC) packages.

Pin grid arrays and dual-in-line surface mount (SOIC) packages were being produced with more and more pins, and with decreasing spacing between the pins, but this was causing difficulties for the soldering process.